3D Heterogenous-Integrated RFICs for the Next-Generation Phased Array

About This Grant

The three-dimensional vertically integrated circuit (3D IC) has emerged as a key technology for extending the trajectory of Moore’s Law by increasing transistor density and circuit functionality through 3D chip stacking. In addition to the benefits of scaling, the 3D IC technology enables heterogeneous integration, allowing different chipsets fabricated by different semiconductor technologies to be combined for optimal performance and cost reduction. This approach holds a significant promise for the next-generation radio-frequency integrated circuits (RFICs). However, current advanced IC packaging technologies remain largely limited to 2.5D integration and antenna-in-package implementations. The direct face-to-face stacking of RFIC chips for full 3D integration, especially with high-frequency RF interfaces, remains largely unexplored. This project aims to develop new fundamental techniques for implementing true 3D-integrated RFICs. As a proof of concept, the project will build a phased-array front-end system operating at frequencies higher than 100 GHz to establish a foundational building block for future high-frequency wideband wireless communication platforms. In parallel, the project includes a robust education and outreach program to introduce advanced wireless and semiconductor technologies to graduate and undergraduate students as well as K-12 students. Through an interdisciplinary hands-on approach, the project aims to inspire students' interest in the STEM fields and foster their early engagement with science and engineering. The project's community outreach efforts will help extend these opportunities to younger students, cultivating the next-generation innovators in advanced wireless and semiconductor technologies. This project aims to develop a scalable planar phased-array transceiver using 3D RFIC techniques to enable next-generation ultra-wide-bandwidth wireless communication systems with antenna beamforming capabilities. The system will be realized through three key engineering innovations: (1) Wireless Interconnects: a low-loss signal transmission method for vertically integrated RFICs separated by a 10-to-20 µm gap, coupled with a cost-effective chip-stacking process. (2) Antenna Characterization via Backscattering: a simplified antenna measurement technique based on electromagnetic backscattering, eliminating the need for traditional RF probing. The method incorporates a CMOS-based electronic calibration technique to de-embed parasitic reflections caused by surrounding structures. (3) Compact Out-phasing Radio Architecture: a compact out-phasing transmitter supporting the 16-STAR modulation, integrated with 3D-stacked silicon-germanium (SiGe) power amplifiers and silicon-based dielectric resonator antennas for efficient transmission and reception. By integrating these innovations, the team aims to demonstrate a scalable 4×4 planar phased-array system operating at both 140 GHz and 240 GHz, paving the way for future compact high-performance wireless systems operating beyond 100 GHz. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.