CAREER: van der Waals Semiconductor Integration via Surface and Interface Tailoring

About This Grant

As the post-10 nm era approaches, further shrinking of silicon microelectronics turns out to be more difficult and less beneficial. Instead, van der Waals semiconductors (vdW-S) with atomic thickness become the leading candidates to further boost the trajectory of Moore’s law. After the successful synthesis of wafer-scale raw materials, the next milestone on this roadmap is the implementation of vdW-S integrated circuits with smaller sizes, higher density, faster speed, and lower energy consumption. However, established methods for bulk material integration, such as silicon, lead to performance degradation, high heat generation, and many other issues in vdW-S. Therefore, new fundamental principles and practical methods are in urgent need, and this project is designed to fill this gap. Considering the ultra-thinness of these emerging materials, their electronic properties are typically decided by the surface and interfacial conditions. With this entry point, the project makes efforts to explore surface/interface tailoring methods and study the corresponding electronic effects for the purpose of vdW-S integration in both planar and three-dimensional (3D) configurations. As a case study, a novel 3D active pixel image sensor (3D-APS) built upon the as-developed principles can provide better color-sensing accuracy, miniature device size, and higher sensitivity than conventional counterparts. As such, it showcases the transformative impacts of this project on a broader scope of applications, such as medical imaging, machine vision, and environmental survey. Along with the research, this project emphasizes the educational responsibility, especially for the underrepresented minority groups in science, technology, engineering, and mathematics, leveraging the advanced status of Georgia State University (GSU) as a minority-serving institute. Graduate and undergraduate students, particularly minority students, receive systematic training in modern material science, electrical engineering, semiconductor process and characterization technologies, instrumentation design and manufacturing, and many more skills. In this process, they build their capabilities and career trajectories as next-generation workforces. The team shares the research experience and achievements via seminars, conferences, and publications, to bring nationwide impacts of this project. Regular open houses, K-12 school visits, and popular science activities are arranged to broadcast the latest research progress to our community, raising public awareness of modern science and technology. The very large-scale integration (VLSI) of vdW-S devices is the next essential topic for their practical applications in computing, communication, medication, and other fields. But the long-standing challenges in selected area doping, contact resistance management, material stability, and characterization methods block the pathway toward these goals. In this regard, this project is arranged to systematically and profoundly investigate the solutions to these problems, and substantially promote the planar and 3D integration of these emerging semiconductor materials. The primary research activities include the following aspects. (i) The project insightfully comprehends the charge doping effects and stability of a surface modification reaction introduced by the PI, in order to facilitate a gentle, precisely controllable, and non-destructive selected area doping approach for planar vdW-S integration. (ii) Conventional metal-to-vdW-S inter-tier contacts are replaced by newly developed direct vdW-S-to-vdW-S (v-v) contacts with conditioned interfaces, which provide a scalable and low-resistance solution for inter-tier connections in 3D integrations. (iii) The research activities leverage the home-built in-situ and non-invasive electrical and optical characterization systems to examine the devices’ stability and performance with convinced accuracy and precision. Beyond that, the 3D-APS delivered by this project can exhibit rich system-level physical and electronic behaviors that otherwise are intangible from single device-level studies, and in turn, deepen the understanding of the synergistic cooperation mechanism in complex vdW-S frameworks. The prototype devices also inspire succeeding innovations of high-performance microelectronics, as core functional units in future VLSI with smaller sizes, higher integration density, faster speed, and lower energy consumption. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.