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NSF
Data centers play a vital role in modern computing, supporting everything from personal internet use to a wide range of industries. As demand for computing power grows, next-generation data centers must be designed with smarter, more precise integration of technologies to improve processing speed, data handling, and power management. At the same time, data centers are becoming increasingly costly to operate, due to high energy consumption and the use of rare materials—both of which present global sustainability challenges. Emerging technologies, such as chiplets and 2.5D integration, offer new possibilities by closely combining memory, specialized accelerators, and general-purpose processors to achieve significantly higher performance. However, achieving energy-efficient and resource-conscious computing with these new technologies remains a complex challenge. It requires innovative approaches to integrating power delivery and signal integrity alongside computing functions, and combining different materials — such as traditional silicon with advanced components like gallium nitride power electronics and cutting-edge memory technologies. The ECOCHIPLETS project will revolutionize the design of next-generation data centers through novel chiplet and 2.5D integration practices. The project will apply economic concepts such as depreciation to cost and lifetime concerns of systems. This promotes approaches that advance capabilities in newly deployed compute servers. These servers will leverage novel chiplet-based design from the ground up to provide new higher performance and energy efficiency approaches along with often ignored concerns such as thermal, power delivery, and signal integrity, critical for system longevity developed through this project. These results will lead to advances in heterogeneous systems ideal for agile virtual hardware design and heterogeneous integration allowing for collecting data center resources to build virtual or disaggregated resources allowing compute software to match workloads seamlessly to various technologies and heterogeneous chiplets in the same package. This project takes a full stack approach by modeling costs and integrating critical components previously ignored in design and simulation tools, such as power electronics and asynchronous circuits. The result is hardware agility and efficiency with adaptability to new compute algorithms while simultaneously promoting long equipment lifetimes and reducing costs. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
Up to $2M
2029-05-31
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